This work investigates the feasibility of the integration of interface circuits for optical communication systems in a standard unmodified digital CMOS process. This paves the way for single chip communication systems where the optical interfaces are integrated on the same die as the required digital circuitry.
The optical receiver is a key element in the optical communication link. In this work, a transimpedance amplifier, which consists of a voltage amplifier with resistive feedback, is used as the first stage. Unlike for many other circuits, the optimal place of its dominant pole is the input node.
It is also demonstrated that a high gain of the voltage amplifier is primordial to obtain good performances and that this may be obtained through the use of multiple stages. Noise aspects are investigated and the conclusion is drawn that the amplifier's input capacitance can be smaller than the photodiode's capacitance for optimal performance.
The theory is put into practice through three integrated optical receivers. They are realized in 0.8 11m and 0.7 11m CMOS and achieve bitrates from 150 Mb/s up to 1 Gb/s. The transimpedance-gain of the preamplifier varies from 1 ill for the 1 Gb/s receiver to 150 ill at 240 Mb/s. To obtain a commercially attractive solution, it is important that the receiver is compatible with available photodiodes.
The receivers are therefore designed for a 1 pF input impedance (0.8 pF for the 1 Gb/s receiver). They don't require any other external component except for a power supply decoupling capacitance. The receivers in this work are not limited to the transimpedance amplifier only.
They all include a post-amplifier that provides further amplification up to a full rail-to-rail output swing. Two of the receivers have an integrated automatic biasing circuit based on a replica and are so fully autonomous.
A LED-driver is presented to implement the transmitter part of the optical link. It is realized in a standard 0.8 11m CMOS technology and achieves a bitrate of over 155 Mb/s with a modulation current over 65 rnA. The possibility to integrate the photodiode on the same die as the receiver is investigated.
Photodiodes realized in a 2.4 11m CMOS technology are demonstrated together with a simple 100 Mb/s transimpedance amplifier. It is shown that the shrinking of the technology to sub-micron devices results in worse photodiodes.
However, with the use of side-wall junctions and shorter optical wavelengths, medium rate optical links can still be realized. In the last part of this work, attention is paid to electrical interference problems that occur when sensitive analog circuits are combined with digital circuitry on the same die.
The three performers - the noise generation, its propagation and the in fluence on sensitive circuits - are witnessed and countermeasures are proposed. One of these is a]lew decoupling method based on an RLC network.
It provides an enhanced transient response of the power supply following a disturbance, without the voltage or power penalty that is introduced by the traditional solution that is based on a resistor in the supply path.
Some other measures, such as a differential approach to single-ended signals and the use of guard rings are also described. The benefit of the countermeasures are used in the design of the 1 Gb/s receiver.