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William W. Sheng is a cofounder of Smart Relay Technology, Inc., where he has served as vice president of engineering. He has been in the electronics industry for over 25 years, specializing in solid-state relay and power semiconductor technologies. After his graduate study, he was on the engineering staff of General Electric Power Semiconductor Department where he was involved in the design and manufacturing of power semiconductor chips and modules.
Prior to Smart Relay Technology, he was the manager of a power hybrid division where he led the development of the PhotoMOS solidstate relay. He has received the Inventor Award from General Electric. He is the author of numerous articles and holds several patents in the semiconductor field. Ronald P. Colino is a cofounder of Smart Relay Technology, Inc., serving as president for the past 13 Years.
A graduate of Manhattan College School of Engineering, Colino has worked in the electronics industry for over 40 years. Part of this time has been as memory products manager at General Instruments Microelectronic Division. His experiences include design and marketing of solid-state relays, hybrid integrated circuits, MOS integrated circuits, and semiconductor memories. Colino is a member of IEEE and the author of several technical papers. He holds several patents in the integrated circuit field.
The insulating substrate serves as the supporting structure for the circuitry of the power module.1 It acts as the surface for depositing conductive, dielectric, and resistive materials that form the passive circuit elements. It is also a base for mechanical support for all active and passive chip components. It must be strong enough to withstand different environmental stresses. Electrically, it must be an insulator to isolate various conductive paths of the circuit.
It must be able to withstand an RMS AC voltage (50 to 60 Hz) of 2500 V applied between any terminal and the case, including the base plate, for a one-minute duration. It must have sufficient thermal conductivity to remove the heat generated by the components. In addition, a high degree of surface smoothness is required for adhesion of films, fine conductor lines, and spacings. Surface flatness is desirable to minimize processing problems during screen-printing, photomasking, etc. Nonflat surfaces do not press uniformly against the base plate. This can potentially lead to microcracks and poor localized thermal conduction.
This requires careful screening of suppliers. Copper has the additional problems of adhesion and being very chemically reactive. A barrier layer is required to improve adhesion, and a Ni or Au layer is required on the surface for protection. 220.127.116.11.3.1 Plated Copper — The concept behind this technique is to build up the thickness of copper material by electroplating. A film is first deposited onto the substrate, either by a thin-film method (sputtering or evaporation) or a thick-film process (screen-printing).
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